Antenna-in-Package Technology and Applications

Duixian Liu, Yueping Zhang

• Publisher: Wiley-IEEE Press
• Year: 2020
• Print ISBN: 9781119556633
• eBook ISBN: 9781119556657
• Edition: 1
• Topic: Technology & Engineering
• Subtopic: Mobile & Wireless Communications
• Index: Technology & Engineering

A comprehensive guide to antenna design, manufacturing processes, antenna integration, and packaging

Antenna-in-Package Technology and Applications contains an introduction to the history of AiP technology. It explores antennas and packages, thermal analysis and design, as well as measurement setups and methods for AiP technology. The authors—well-known experts on the topic—explain why microstrip patch antennas are the most popular and describe the myriad constraints of packaging, such as electrical performance, thermo-mechanical reliability, compactness, manufacturability, and cost. The book includes information on how the choice of interconnects is governed by JEDEC for automatic assembly and describes low-temperature co-fired ceramic, high-density interconnects, fan-out wafer level packaging–based AiP, and 3D-printing-based AiP. The book includes a detailed discussion of the surface laminar circuit–based AiP designs for large-scale mm-wave phased arrays for 94-GHz imagers and 28-GHz 5G New Radios. Additionally, the book includes information on 3D AiP for sensor nodes, near-field wireless power transfer, and IoT applications. This important book:

• Includes a brief history of antenna-in-package technology
• Describes package structures widely used in AiP, such as ball grid array (BGA) and quad flat no-leads (QFN)
• Explores the concepts, materials and processes, designs, and verifications with special consideration for excellent electrical, mechanical, and thermal performance

Written for students in electrical engineering, professors, researchers, and RF engineers, Antenna-in-Package Technology and Applications offers a guide to material selection for antennas and packages, antenna design with manufacturing processes and packaging constraints, antenna integration, and packaging.

1
Introduction

Yueping Zhang

School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore

1.1 Background

As the technology of choice for integration of digital circuitry, a complementary metal oxide semiconductor (CMOS) was proposed for the integration of analog circuitry for radio frequency (RF) applications in the mid‐1980s, aiming for the ultimate goal of full integration of an entire wireless system on a chip [1]. In the mid‐1990s, the first fully integrated CMOS transceiver for data communications in the 900‐MHz industrial, scientific and medical (ISM) band was successfully demonstrated [2]. Since then, CMOS has been the enabler for wireless systems on chip (SoCs) operating from a few to tens of gigahertz. Figure 1.1 shows the die micrograph of the first wireless SoC, a 2.4‐GHz CMOS mixed RF analog–digital Bluetooth radio announced at the International Solid‐State Circuits Conference (ISSCC) 2001 [3]. The die size is 40.1 mm². It integrates on the same substrate a low intermediate frequency (IF) receiver, a Cartesian transmitter, a baseband processer, an advanced reduced‐instruction set‐computer machine (ARM) processor, flash memory, and random‐access memory (RAM).

Full SoC integration is clearly not suitable in all cases. In fact, the radio chip is separate in many cases. Traditionally, silicon germanium (SiGe) seems to have been preferred to CMOS for analog RF. Figure 1.2 shows the die micrographs of the first SiGe 60‐GHz transmitter and receiver disclosed at ISSCC 2006 [4]. The die sizes are 4.0 × 1.6 mm² and 3.4 × 1.7 mm², respectively. The level of integration achieved in these chips was high then for 60‐GHz radios. The transmitter chip integrates a power amplifier, image‐reject driver, IF‐to‐RF up‐mixer, IF amplifiers, quadrature baseband‐to‐IF mixers, phase‐locked loop (PLL), and frequency tripler. The receiver chip includes an image‐reject low‐noise amplifier, RF‐to‐IF mixer, IF amplifiers, quadrature IF‐to‐baseband mixers, PLL, and frequency tripler. The input/output (I/O) pads are peripheral, with 60 on the transmitter and 53 on the receiver chips.

Figure 1.1 Micrograph of the first 2.4‐GHz CMOS wireless SoC, a Bluetooth radio (from [3], © 2001 IEEE, reprinted with permission).

Figure 1.2 Photographs of the first 60‐GHz SiGe radio chipset: (a) transmitter and (b) receiver (from [4], © 2006 IEEE, reprinted with permission).

The emergence of wireless SoCs or single‐chip radios called for compatible antenna solutions, which provided an excellent opportunity for researchers of prepared minds to seriously explore the feasibility of integrating an antenna in a chip package using packaging materials and processes in the late 1990s, leading to the development of antenna‐in‐package (AiP) technology [5]. This chapter recounts how AiP technology has been developed to its current state. Section 1.2 describes the idea of AiP with respect to the ideas of antenna on chip (AoC), antenna in module (AiM), antenna on board (AoB), and active integrated antenna (AIA). Section 1.3 reviews the early attempts to explore the idea of AiP. Section 1.4 reflects on the milestones in the development of the idea of AiP into a mainstream antenna and packaging technology. Finally, Section 1.5 gives concluding remarks.

1.2 The Idea

The idea of AiP was triggered by the demand for innovative antenna solutions to wireless SoCs [6]. It features using packaging technology to implement an antenna (or antennas) with a radio or radar die (or dies) in a chip package. It emphasizes only the addition of the unique function of radiation to the package. In this sense, it is different from the concept of system‐in‐package (SiP).

The idea of AoC sounds attractive [7]. It attempts to integrate an antenna (or antennas) with other circuits on a die directly using semiconductor technology. It is obviously a subset of the concept of SoC. Then why do we specifically differentiate it from SoC? The reason is to highlight the unique property of radiation, which is not necessarily being improved like digital circuits as the technology scales down. It is clear that AoC is more suitable for terahertz applications for cost and performance reasons.

The idea of AiM was proposed for multichip 60‐GHz radios [8]. It uses micro‐assembly technology to mount a few monolithic microwave integrated circuits (MMICs) and a small flat antenna in a hermetically sealed package. A window for the propagation of electromagnetic waves is formed above the antenna at the lid of the package. The window is also hermetically sealed.

The idea of AoB is similar to the idea of AiP. However, it relies on printed circuit board (PCB) technology to make an antenna (or antennas) on one surface of a board and to solder a packaged chip (or chips) on the other surface of the board. A few techniques, such as probe feeding or aperture coupling, are available to interconnect the packaged chip with the antenna. Of course, the antenna, the packaged chip, and the necessary feed networks can be contained on the same surface of the board. Recently, the idea of AoB has received considerable attention for millimeter‐wave (mmWave) fifth‐generation (5G) base stations [9].

A typical AIA consists of active devices such as Gunn diodes or transistors that form an active circuit and a planar antenna. The idea of AIA was proposed to eliminate the lossy and bulky interconnect between the active device and radiating element [10]. Later, the idea of AIA was employed for quasi‐optical power combining. The output power from an array of many solid‐state devices was combined in free space to overcome the power limitations of individual solid‐state devices at mmWave frequencies.

Although the origin of the above ideas can be traced back to the invention of microstrip antennas in the early 1970s [11], it should be noted that they extended the concept of microstrip antennas to different levels of integration.

1.3 Exploring the Idea

In this section, the early attempts to explore the idea of AiP are reviewed. It should be mentioned that researchers in university labs devoted their efforts regarding Bluetooth radios to 2.4 GHz or other RF applications, while researchers in company labs focused on 60‐GHz radios and other mmWave applications. At 2.4 GHz, a key challenge was how to miniaturize the antenna size, while at 60 GHz, it was how to minimize the interconnect loss between the die and antenna.

1.3.1 Bluetooth Radio and Other RF Applications

In 1998, Zhang started to work in the Division of Circuits and Systems at the School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore. The division soon initiated a strategic research project entitled “Software radio on a chip.” Zhang was tasked to develop an antenna technology for the project. Inspired by the structural similarity shared by a microstrip antenna and a microchip, shown in Figure 1.3, and fores...

Table of contents

• Cover
• Table of Contents
• List of Contributors
• Preface
• Abbreviations
• 1 Introduction
• 2 Antennas
• 3 Packaging Technologies
• 4 Electrical, Mechanical, and Thermal Co‐Design
• 5 Antenna‐in‐Package Measurements
• 6 Antenna‐in‐package Designs in Multilayered Low‐temperature Co‐fired Ceramic Platforms
• 7 Antenna Integration in Packaging Technology operating from 60 GHz up to 300 GHz (HDI‐based AiP)
• 8 Antenna Integration in eWLB Package
• 9 Additive Manufacturing AiP Designs and Applications
• 10 SLC‐based AiP for Phased Array Applications
• 11 3D AiP for Power Transfer, Sensor Nodes, and IoT Applications
• Index
• End User License Agreement