VLSI

Zhongfeng Wang

• Publisher: IntechOpen
• Year: 2010
• Print ISBN: 9789533070490
• eBook ISBN: 9789535158738
• Topic: Technology & Engineering
• Subtopic: Electrical Engineering & Telecommunications
• Index: Technology & Engineering

The process of Integrated Circuits (IC) started its era of VLSI (Very Large Scale Integration) in 1970's when thousands of transistors were integrated into one single chip. Nowadays we are able to integrate more than a billion transistors on a single chip. However, the term "VLSI" is still being used, though there was some effort to coin a new term ULSI (Ultra-Large Scale Integration) for fine distinctions many years ago. VLSI technology has brought tremendous benefits to our everyday life since its occurrence. VLSI circuits are used everywhere, real applications include microprocessors in a personal computer or workstation, chips in a graphic card, digital camera or camcorder, chips in a cell phone or a portable computing device, and embedded processors in an automobile, et al. VLSI covers many phases of design and fabrication of integrated circuits. For a commercial chip design, it involves system definition, VLSI architecture design and optimization, RTL (register transfer language) coding, (pre- and post-synthesis) simulation and verification, synthesis, place and route, timing analyses and timing closure, and multi-step semiconductor device fabrication including wafer processing, die preparation, IC packaging and testing, et al. As the process technology scales down, hundreds or even thousands of millions of transistors are integrated into one single chip. Hence, more and more complicated systems can be integrated into a single chip, the so-called System-on-chip (SoC), which brings to VLSI engineers ever increasingly challenges to master techniques in various phases of VLSI design. For modern SoC design, practical applications are usually speed hungry. For instance, Ethernet standard has evolved from 10Mbps to 10Gbps. Now the specification for 100Mbps Ethernet is on the way. On the other hand, with the popularity of wireless and portable computing devices, low power consumption has become extremely critical. To meet these contradicting requirements, VLSI designers have to perform optimizations at all levels of design. This book is intended to cover a wide range of VLSI design topics. The book can be roughly partitioned into four parts. Part I is mainly focused on algorithmic level and architectural level VLSI design and optimization for image and video signal processing systems. Part II addresses VLSI design optimizations for cryptography and error correction coding. Part III discusses general SoC design techniques as well as other application-specific VLSI design optimizations. The last part will cover generic nano-scale circuit-level design techniques.

Table of contents

• VLSI
• Preface
• Contents
• Discrete Wavelet Transform Structures for VLSI Architecture Design
• High Performance Parallel Pipelined Lifting-based VLSI Architectures for Two-Dimensional Inverse Discrete Wavelet Transform
• Contour-Based Binary Motion Estimation Algorithm and VLSI Design for MPEG-4 Shape Coding
• Memory-Efficient Hardware Architecture of 2-D Dual-Mode Lifting-Based Discrete Wavelet Transform for JPEG2000
• Full HD JPEG XR Encoder Design for Digital Photography Applications
• The Design of IP Cores in Finite Field for Error Correction
• Scalable and Systolic Gaussian Normal Basis Multipliers over GF(2m) Using Hankel Matrix-Vector Representation
• High-Speed VLSI Architectures for Turbo Decoders
• Ultra-High Speed LDPC Code Design and Implementation
• A Methodology for Parabolic Synthesis
• Fully Systolic FFT Architectures for Giga-sample Applications
• Radio-Frequency (RF) Beamforming Using Systolic FPGA-based Two Dimensional (2D) IIR Space-time Filters
• A VLSI Architecture for Output Probability Computations of HMM-based Recognition Systems
• Efficient Built-in Self-Test for Video Coding Cores: A Case Study on Motion Estimation Computing Array
• SOC Design for Speech-to-Speech Translation
• A Novel De Bruijn Based MeshTopology for Networks-on-Chip
• On the Efficient Design & Synthesis of Differential Clock Distribution Networks
• Robust Design and Test of Analog/Mixed-Signal Circuits in Deeply Scaled CMOS Technologies
• Nanoelectronic Design Based on a CNT Nano-Architecture
• A New Technique of Interconnect Effects Equalization by using Negative Group Delay Active Circuits
• Book Embeddings
• VLSI Thermal Analysis and Monitoring