Computer Science
Cache Memory
Cache memory is a type of high-speed memory that stores frequently used data for quick access. It is located closer to the CPU than main memory, allowing the processor to access data more quickly. The use of cache memory can significantly improve the performance of a computer system.
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10 Key excerpts on "Cache Memory"
eBook - PDF- Arnold S. Berger(Author)
- 2005(Publication Date)
- Newnes(Publisher)
A cache is a nearby, local storage system. In a CPU we could call the register set the zero level cache. Also, on-chip, as we saw there is another, somewhat larger Cache Memory system. This memoiry typically runs at the speed of the CPU, although it is sometimes slower then regular access times. Processors will often have two separate LI caches, one for instructions and one for data. As w(^'ve seen, this is an internal implementation of the Harvard architecture. The usefulness of a cache stems from the general characteristics of programs that we call locality. There are two types of locality, although they are alternative ways to describe the same principle. Locality of Reference asserts that program tend to access data and instructions that were recently accessed before, or that are located in nearby memory locations. Programs tend to execute instruc-tions in sequence from adjacent memory locations and programs tend to have loops in which a group of nearby instructions is executed repeatedly. In terms of data structures, compilers stores arrays in blocks of adjacent memory locations and programs tend to access array elements in sequence. Also, compilers store unrelated variables together, such as local variables on a stack. Temporal locality says that once an item is referenced it will tend to be referenced again soon and spatial locality says that nearby items will tend to be referenced soon. Let's examine the principle of locality in terms of a two-level memory hierarchy. This example will have an upper-level (Cache Memory) and a lower level (main memory).The two-level structure means that if the data we want isn't in the cache, we will go to the lower level and retrieve at least one block of data from main memory. We'll also define a cache hit as a data or instruction request by the CPU to the Cache Memory where the information requested is in cache and a cache miss as the reverse situation; the CPU requests data and the data is not in the cache.
eBook - PDF- Aharon Yadin(Author)
- 2016(Publication Date)
- Chapman and Hall/CRC(Publisher)
This is a relatively small-capacity memory used for storing just the instructions and data that are currently within the processor or that will be required for execution. Since it is usually a smaller memory (in terms of capacity), it can be more expensive. The added cost it inflicts will have a very marginal effect on the overall system’s price. This combination provides the better of the two solutions: on the one hand, a fast memory that will enhance performance; and on the other hand, a mean-ingless increase in price. Every time the processor needs data or instructions, it will look first in the Cache Memory. If it is found, then the access time will be very fast. If it is not in the cache, it will have to be brought from memory, and then the time will be longer ( Figure 6.6). To better understand the concept of Cache Memory, we will use a more realistic and known example. Let us assume that a student has to write a seminar paper and for that reason he or she is working in the library. The student has a limited-sized desk on which only one book can be used. Every time he or she has to refer to or cite various bibliographic sources, he or she has to return the book to the shelf, take the new book that is needed, and bring it to the working desk. It should be noted that sometimes it is a very large library, and the books needed may be on a different floor. Furthermore, the working space and the desk may be located in a special area far away from the shelves and sometimes even in a different building. Due to library rules that permit only one book on the desk, before using a new book, the current one has to be returned. Even if the previous book that he or she used several minutes ago is needed once more, it does not shorten the time, and the student has to return the current book and bring out the previous one once again. The only benefit Processor Cache Memory Main memor y . . . . . . . . . . . . Word transfer Block transfer FIGURE 6.6 Cache data transfer.
eBook - ePubEmbedded Systems
A Contemporary Design Tool
- James K. Peckol(Author)
- 2019(Publication Date)
- Wiley(Publisher)
These are known as secondary memory and are shown in the diagram by the block on the left. At the bottom are the smallest, fastest memories called Cache Memory; these are typically higher speed SRAMs. These devices also tend to be the most expensive. In the middle of the hierarchy is main or prima ry memory. These are either lower speed SRAM devices or, more commonly, DRAM memories. CPU registers are sometimes included in the ranking as higher speed memory than cache. The motivation for building a memory system as a hierarchical collection of different kinds of memories is that we would prefer an application program to execute as quickly as possible. Accessing memory takes time; each access contributes to the time required to execute an instruction that can have a significant negative impact on real‐time performance in an embedded application. We will not consider secondary storage; the typical embedded applications will not use this. The discussion here will focus on main memory and cache, the last two blocks on the right. These can be implemented using (variations on) the designs presented in the previous sections. 4.15 Basic Concepts of Caching icache, dcache Cache is a small, fast memory that temporarily holds copies of block data and program instructions from the main memory. The increased speed of Cache Memory over that of main memory components offers the prospective for programs to execute much more rapidly if the instructions and data can be held in cache. Many of today's higher performance microprocessors, implemented around the Harvard architecture, will internally support both an icache (instruction cache) and a dcache (data cache). We will now examine the concept of caching in greater detail. We will look first at the ideas behind caching, what cache is, why it works, and some of the potential difficulties encountered in embedded applications
eBook - PDFComputer Organisation and Architecture
An Introduction
- B.S. Chalk, Antony Carter, Robert Hind(Authors)
- 2017(Publication Date)
- Red Globe Press(Publisher)
Main memory provides the largest internal storage area that can be directly accessed by the CPU, having a typical storage capacity of between 128 MBytes and 512 MBytes in a PC. There may be more in PCs being used as network servers and in many mainframe computer systems. To reduce cost, main memory is normally implemented using Dynamic Random Access Memory (DRAM) chips (see Section 6.3). Because DRAM operates at around one-tenth of the speed of CPU logic, it tends to act as a bottleneck, reducing the rate at which the processor can fetch and execute instructions. To compensate for this, many systems include a small high-speed Cache Memory. Cache Memory sits between the CPU and main memory and is usually implemented using more expensive Static Random Access Memory (SRAM) technology (see Section 6.3). This transparent memory is used for storing frequently used program segments. Each time the CPU requests an instruction or data word, the cache is always checked first. If the information is found in the cache, a ‘hit’ occurs and the instruction or data word is rapidly retrieved and passed directly to the processor. If the information is not in the cache, a ‘miss’ takes place and the slower memory is accessed instead. Once the data has been retrieved from main memory after a miss it is placed in Cache Memory in case it will be required again in the near future. Memory that is not directly accessible by the CPU is called external memory and includes secondary storage devices such as magnetic disks, tapes and optical storage devices, such as CD-ROMs and DVDs. These devices, which must be accessed through input–output (I/O) interface circuits, are the slowest components in the memory hierarchy. They provide a high-capacity storage area for programs and data not immediately required by the processor.
- Jocelyn O. Padallan(Author)
- 2023(Publication Date)
- Arcler Press(Publisher)
This makes it possible for the TLB to facilitate the quick translation of virtual addresses that have been cached. The translation lookaside buffer, or TLB, is a cache that holds sections of the page table that the processor has only very recently viewed (Cohen & Kaplan, 2001). 4.5. MAIN MEMORY In contrast to caches, which have been primarily geared for higher speed, the primary objective of main memory has been to offer as much capacity as feasible at a cheap cost and with reasonable latency. DRAM (dynamic random-access memory, pronounced “dee-ram”) is hence the ideal physical substrate for constructing main memory. A DRAM cell has been the smallest unit of DRAM, comprising one capacitor (1C) and one transistor (1T) (Dell, 1997). A DRAM cell maintains a single piece of data (1 or 0) as an electrical charge (“discharged” or “charged”) inside its capacitor. The fundamental benefit of DRAM over SRAM is its smaller cell size: DRAM cells need fewer electrical elements (1C and 1T) than SRAM cells (6T). Consequently, far more DRAM cells may be packed on a similar area of a semiconductor chip, allowing DRAM-dependent main memory to reach a significantly greater capacity for roughly the same price (Garcia-Molina & Salem, 1992) (Figure 4.15). Communication in Computer Memory Systems 149 Figure 4.15. Kinds of DRAM. Source: https://fr.transcend-info.com/Support/FAQ-1263. SRAM-dependent caches are often built onto a similar semiconductor chip as the CPU. DRAM-dependent main memory, on the other hand, has been implemented utilizing one or many specialized DRAM chips independent from the CPU chip. This has been because of two factors. To begin with, a big capacity of main memory necessitates so many DRAM cells that they may not all fit on a similar chip as the CPU (Qureshi et al., 2009). Secondly, the process technology used to make DRAM cells (and associated capacitors) is incompatible with the process technology used to make processor chips at a cheap cost.
eBook - ePub- Aharon Yadin(Author)
- 2016(Publication Date)
- Chapman and Hall/CRC(Publisher)
6 Cache Memory Cache MemoryThis chapter focuses on Cache Memory. By using the general architecture figure, we can relate to the Cache Memory and its contribution to system performance (Figure 6.1 ).As stated in the previous chapter, Cache Memory is an important layer in the memory hierarchy, and its main contribution is in improving the execution speed. The memory hierarchy is depicted once again in Figure 6.2 , but this time the emphasis is on the sizes of the various levels of the hierarchy. The slowest and largest level (as far as capacity is concerned) is the disks. Currently, the standard disks used in personal computers (PCs) have a capacity that starts with several hundreds of gigabytes and goes up to several terabytes. Furthermore, utilizing cloud computing, in which the system’s resources reside on remote servers, the disk capacity increases significantly. The main memory (random access memory [RAM]), which represents the second level, has a standard capacity ranging from several gigabytes up to hundreds of gigabytes. The Cache Memory, which is the next level, is usually divided into several components, each with a different purpose and a different size. The last level of the memory hierarchy is the registers which usually are very limited.The RAM described in the previous chapter is used for storing programs and data. There is another memory component called read-only memory (ROM), which is used by the operating system and the hardware and is intended for components (programs and/or data) that do not change frequently. Despite its name, some of the currently available ROMs can be changed; sometimes, a special recording device is required. Even so, their main use remains for special operating systems or hardware functions. As such, ROM is not available for standard computer programs.One of the important attributes of ROM is the fact it is a nonvolatile memory, which means it retains its content even if the power is switched off. For that reason, ROM is used, for example, by the boot programs that are responsible for bringing the system up. Other components stored in the ROM are programs or data required for managing some input and output devices. Usually, these types of data will not be modified during the life span of the device. In modern computers, some of the ROM is replaced by flash memory, which is a nonvolatile device that can be rewritten if the need arises.
eBook - PDFComputer Architecture
Fundamentals and Principles of Computer Design, Second Edition
- Joseph D. Dumas II(Author)
- 2016(Publication Date)
- CRC Press(Publisher)
Figure 2.3 Memory hierarchy (typical of modern computer systems). Because the higher levels of the memory hierarchy have smaller capacities, it is impossible to keep all the information (program code and data) we need in these levels at one time. In practice, each higher level of the hierarchy contains only a subset of the information from the levels below it. The fundamental idea underlying the hierarchical mem-ory concept is that we want to make as many accesses (as a percentage of the total) as we can to the upper levels of the hierarchy while only Most exp ensive Smallest capacity Fastest Least expensiv e Highest capacity Slowest CPU registers Level 1 cache Level 2 cache Level 3 cache Main (primary) memory Disk (secondary) memory Backup storage 62 Computer Architecture rarely having to access the lower levels, such that the resulting, overall memory system (taking into account all devices) approaches the speed of the highest levels while maintaining a capacity and cost per gigabyte approximating that of the lowest levels (the secondary storage devices). This requires a complex and well-thought-out design of which, for best acceptance, the details should be hidden from the end user. As much as possible, only the system designers should have to deal with the details of managing the memory system for optimal performance. However, if one is to be responsible for specifying computer systems whose performance is important or for developing code to run in such an environment, it is worthwhile to study the techniques used to optimize memory systems. Optimizing the performance of memory systems has always been a big problem due to technological and cost limitations. For the vast majority of tasks, computer systems tend to require much more code and data storage than computational hardware; thus, it is generally not cost-effective to build the memory system using the same technology as the processor.
eBook - PDF- Alvin Albuero De Luna(Author)
- 2023(Publication Date)
- Arcler Press(Publisher)
It enables every cache to be located closer to the CPU, reducing the time it takes to deliver data and instructions to the processor (Alonso et al., 1963; Honig, 1993). 3.4.4. Specialized Caches for Virtual Memory In the systems of virtual memory, specialized caches are employed to speed up the translation of address by reducing the amount of time it takes. The term “TLB” (translation lookaside buffer) refers to the cache that is most typically utilized. The purpose of a TLB is to store the most recent utilized virtual to physical address translations performed by the processor, allowing the translation to be performed quickly for virtual addresses that reach the TLB. A TLB, in its most basic definition, is a cache that stores portions of the page table that have been recently accessed by the processor (Langmuir, 1960; Frankel, 1964). 3.5. MAIN MEMORY Whereas caches have been primarily designed for fast performance, the primary goal of main memory is to offer as much capacity as feasible at the lowest possible cost and with as little delay as possible. As a result, DRAM (dynamic random-access memory; pronounced as ”dee-ram”) has been the physical substrate of choice for constructing main memory (Bersagol et al., 1996; Benenson et al., 2004). This is a DRAM cell that has one capacitor and one transistor (1T) that constitutes the smaller unit of DRAM (1C). A single bit of data (0 or 1) is stored in a DRAM cell in the form of an electrical charge inside its capacitor (which can be either “charged” or “discharged”). Because DRAM has a smaller cell size than SRAM, it has the benefit of being more energy-efficient. A DRAM cell requires fewer electrical elements 1T and 1C) than an SRAM cell (6T). Consequently, many more DRAM cells may be packed on a semiconductor chip in a similar amount of
eBook - PDF- A Thorne(Author)
- 2025(Publication Date)
- Macmillan(Publisher)
Primary memory (system memory or main memory) Volatile memory Non-volatile memory This is short-term memory that loses its contents when the computer is switched off. This is long-term memory that keeps its contents even when there is no power supply. RAM (Random Access Memory ) • A RAM chip is an electronic data storage medium. The CPU writes and rewrites the information stored in each RAM chip. • Data and program code that the CPU needs for an activity are loaded temporarily in RAM. • The more RAM a computer has, the faster it can perform. • The capacity of RAM is measured in MB or GB. • The speed of RAM is measured in MHz or GHz. Cache (Pronounced ‘cash’; rhymes with ‘flash’) • Cache Memory is a small piece of volatile memory linked to the CPU. • It stores data and program code that are used often. This enables high-speed access to the CPU. • There is memory cache (or Static RAM), and disk cache (or Dynamic RAM). ROM (Read Only Memory) • ROM is used to store permanent information needed to operate the system (e.g. starting up the computer). • An essential ROM chip is the BIOS (Basic Input/ Output) for setting up a computer. • It is not easy to erase the contents of ROM chips. Flash (USB memory; ‘data stick’) • Flash memory is a memory chip for storing data so that it can be transferred from a PC to another device, or the other way around. • It can be used to make a copy or backup of information. • You can erase the information on a flash drive. Figure 1.3.6: Different types of primary memory Memory is also important in the activities of the CPU . The CPU works with the input, output and storage devices. It processes information and carries out instructions from the computer’s software and hardware. The CPU fetches a program instruction from the main memory, carries it out and stores the results in the memory. It then fetches the next instruction. This all happens very fast. The control unit in the CPU controls all its activity.
eBook - PDFMicroprocessor Architectures and Systems
RISC, CISC and DSP
- Steve Heath(Author)
- 2014(Publication Date)
- Newnes(Publisher)
Cache Memory systems store these loops so that after the loop has been fetched from main memory, it can be obtained from the cache for subsequent executions. Accesses from cache are faster than from main memory and thus increase system throughput. This means that caches cannot be 100% efficient — the first accesses always goes through to main memory. Cache size and organization There are several criteria associated with cache design which affect its performance. The most obvious is cache size and organization — the larger the cache, the more entries that are stored and the higher the hit rate. However, as the cache size increases, the return gets smaller and smaller. In practice, the cache costs and complexity place an economic limit on most designs. As the size of programs increase, larger caches are needed to maintain the same hit rate and hence the 'ideal cache size is always twice that available' comment. In reality, it is the combination of size, organization and cost that really determines the size and its efficiency. Consider a basic cache operation. The processor generates an address which is fed into the Cache Memory system. The cache stores its data in an array with an address tag, each tag being compared in turn with the incoming address. If they do not match, the next tag is compared. If they do match, a cache hit occurs, the corresponding data within the array is passed 138 Microprocessor Architectures and Systems on the data bus to the processor and no further comparisons are made. If no match is found (a cache miss), the data is fetched from external memory and a new entry is created in the array. This is simple to implement, needing only a memory array and a single comparator and counter. Unfortunately, the efficiency is not very good due to the serial interrogation of the tags.
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