Radio-Frequency Digital-to-Analog Converters

Implementation in Nanoscale CMOS

Morteza S Alavi, Jaimin Mehta, Robert Bogdan Staszewski

• Publisher: Academic Press
• Year: 2016
• Print ISBN: 9780128022634
• eBook ISBN: 9780128025031
• Topic: Technology & Engineering
• Subtopic: Electrical Engineering & Telecommunications
• Index: Technology & Engineering

With the proliferation of wireless networks, there is a need for more compact, low-cost, power efficient transmitters that are capable of supporting the various communication standards, including Bluetooth, WLAN, GSM/EDGE, WCDMA and 4G of 3GPP cellular. This book describes a novel idea of RF digital-to-analog converters (RFDAC) and demonstrates how they can realize all-digital, fully-integrated RF transmitters that support all the current multi-mode and multi-band communication standards. With this book the reader will: - Understand the challenges of realizing a universal CMOS RF transmitter - Recognize the design issues and the advantages and disadvantages related to analog and digital transmitter architectures - Master designing an RF transmitter from system level modeling techniques down to circuitdesigns and their related layout know-hows - Grasp digital polar and I/Q calibration techniques as well as the digital predistortion approaches - Learn how to generate appropriate digital I/Q baseband signals in order to apply them to the test chip and measure the RF-DAC performance. - Highlights the benefits and implementation challenges of software-defined transmitters using CMOS technology - Includes various types of analog and digital RF transmitter architectures for wireless applications - Presents an all-digital polar RFDAC transmitter architecture and describes in detail its implementation - Presents a new all-digital I/Q RFDAC transmitter architecture and its implementation - Provides comprehensive design techniques from system level to circuit level - Introduces several digital predistortion techniques which can be used in RF transmitters - Describes the entire flow of system modeling, circuit simulation, layout techniques and the measurement process

Chapter 1

Introduction

Abstract

The reasons for writing this book are outlined in this introductory chapter. The conventional radio has too many components, which are bulky, costly, and consume too much power. Further, the technology used tends not to be aligned with the deep nanoscale CMOS used by digital processors. Hence, a new digitally intensive wideband in-phase/quadrature transmitter architecture is proposed to remove the aforementioned handicaps and to promote further progress. The chapter then gives necessary background to understand the system-level aspects of wireless transmitters and qualitatively compares the new architecture with prior art.

Keywords

Multimode; Multiband; Transmitter architecture; Radio integration; Technology scaling; Analog-intensive transmitter; Digitally intensive transmitter; Polar topology; Cartesian topology; Nanoscale CMOS

Chapter Outline

1.1 The Conventional RF Radio

1.2 Motivation

1.3 The Book Objectives

1.3.1 System Simulation of WCDMA Baseband Data

1.3.2 Some Important Figures-of-Merit in RF Transmitters

1.4 Analog Versus Digital RF Transmitters

1.5 Analog-Intensive RF Transmitters

1.6 Digitally Intensive RF Transmitters

1.7 New Paradigm of RF Design in Nanometer-Scale CMOS

1.8 All-Digital Polar Transmitter

1.9 All-Digital I/Q Transmitter

1.10 Conclusion

1.11 Book Outline

Consumer electronic devices such as smartphones, tablets, and laptops are constantly evaluated against three key criteria: low-cost, high-power efficiency, and support of multimode/multiband communication standards such as Wi-Fi or wireless LAN (IEEE 802.11) [1], Bluetooth [2], GNSS,¹ second-generation (2G) cellular using GSM, third-generation (3G) cellular using WCDMA [3], and fourth-generation (4G) cellular using either of WiMAX or 3GPP LTE [4, 5]. These gadget devices comprise a myriad of IC chips to perform an extensive number of distinct functions such as multimedia streaming and gaming as well as supporting the aforementioned communication standards. As an example of contemporary gadget devices, Fig. 1.1 illustrates the mainboard of a smartphone, for example, the iPhone 5. It consists of an application processor (AP) unit, subscriber identification module (SIM) card slot, NAND flash memory, power management unit, Class-D audio amplifier, and, most significantly, a number of RF transceiver modules that support today’s universal communication standards such as GSM, CDMA, Wi-Fi/Bluetooth/FM, GPS, and LTE in combination with its power management unit. Over the past two decades, there have been tremendous efforts to design RF radios that will afford an opportunity to address the low-power, low-cost, and extremely power-efficient demands and, yet, they have also employed inventive transceiver architectures.

Fig. 1.1 The front and rear mainboard of iPhone-5. Courtesy of Apple Inc.

1.1 The Conventional RF Radio

As depicted in Fig. 1.2A, a conventional RF transceiver consists of a baseband DSP unit, TX, and RX [6, 7]. The transmitter performs in the following manner: The anticipated transmitted information such as voice, video, or digital data like text/images are initially digitally processed, then encoded, and subsequently applied to a DAC in order to convert the digital data to their corresponding analog counterparts. Due to the fact that these analog signals comprise unwelcome noise and spectral replicas, the transmitter utilizes a low-pass filter (LPF) to reduce those undesirable artifacts. The filtered analog signals are subsequently mixed with an RF LO utilizing an upconverting mixer and, consequently, upconverted to their designated RF transmit frequency band. Otherwise stated, as illustrated in Fig. 1.2B, the LO signal translates the low-frequency baseband analog signals with the bandwidth of ω_BB into their equivalent high-frequency RF representation. In fact, the LO clock modulates the baseband signal. Thus, the upconverting RF mixer is referred to as an RF modulator. A PA is succeedingly employed to efficiently boost the RF signal. The subsequent RF amplified signal is then applied to either a duplexer or transmit/receive (T/R) switch² in order to be delivered to the transmitting antenna.

Fig. 1.2 (A) A conventional RF transceiver, (B) frequency-domain illustration of modulating the baseband signal.

In the receiver, however, its sensitivity is ameliorated utilizing a low-noise amplifier (LNA). The subsequent signal is then down converted to baseband frequency utilizing a down-converter mixer, which is also referred to as a demodulator. By employing a few LPF circuits and then an ADC, the received signal is digitized for further digital baseband-processing operation.

Among transceiver blocks, the RF transmitter is considered to be the most power consuming block of the entire radio, thus being a hindrance for extending the battery lifetime of portable wireless devices. This is due to the fact that it comprises power hungry building blocks such as DAC, the upconverting mixer, and, most importantly, the RF PA. For example, in the aforementioned smartphone, as indicated in Fig. 1.1, there are at least six different RF-PA modules³ to support multiband/multimode communication standards.

Consequently, the power amplifiers are the most “power-hungry” building blocks of any portable device due to the high-power RF signal generation that is required by the corresponding communication standard to continuously ensure an impeccable transmitting operation. For example, the corresponding PA in the GSM standard should provide 2 W RF power. Considering a power efficiency as high as 40%, the battery must drain 5 W to generate such RF power which reduces the battery life of the portable device [8–10].

It is worth mentioning that, currently, there are over 6 billion cellular phone users and, in particular, the number of smartphone users is increasing exponentially. Table 1.1 depicts the third quarter of 2012–2013 global smartphone market. As is indicated, smartphone production increases approximately 45% every year. With the progressive number of wireless devices and the relative shortage of bandwidth availability, it will become increasingly difficult to transmit pow...

Table of contents

• Cover image
• Title page
• Table of Contents
• Copyright
• Preface
• Acknowledgment
• Acronyms
• Chapter 1: Introduction
• Chapter 2: Digital polar transmitter architecture
• Chapter 3: Digital baseband of the polar transmitter
• Chapter 4: RF front-end (RFDAC) of the polar transmitter
• Chapter 5: Simulation and measurement results of the polar transmitter
• Chapter 6: Idea of all-digital I/Q modulator
• Chapter 7: Orthogonal summation: A 2 × 3-bit all-digital I/Q RFDAC
• Chapter 8: Toward high-resolution RFDAC: The system design perspective
• Chapter 9: Differential I/Q DPA and power-combining network
• Chapter 10: A wideband 2 × 13-bit all-digital I/Q RFDAC
• Chapter 11: Measurement results of the 2 × 13-bit I/Q RFDAC
• Chapter 12: Future of RFDAC
• Appendix A: Appendix for the polar transmitter
• Appendix B: Appendix for I/Q RFDAC
• References
• Index