
- 362 pages
- English
- ePUB (mobile friendly)
- Available on iOS & Android
Asynchronous On-Chip Networks and Fault-Tolerant Techniques
About this book
Asynchronous On-Chip Networks and Fault-Tolerant Techniques is the first comprehensive study of fault-tolerance and fault-caused deadlock effects in asynchronous on-chip networks, aiming to overcome these drawbacks and ensure greater reliability of applications.
As a promising alternative to the widely used synchronous on-chip networks for multicore processors, asynchronous on-chip networks can be vulnerable to faults even if they can deliver the same performance with much lower energy and area compared with their synchronous counterparts – faults can not only corrupt data transmission but also cause a unique type of deadlock. By adopting a new redundant code along with a dynamic fault detection and recovery scheme, the authors demonstrate that asynchronous on-chip networks can be efficiently hardened to tolerate both transient and permanent faults and overcome fault-caused deadlocks.
This book will serve as an essential guide for researchers and students studying interconnection networks, fault-tolerant computing, asynchronous system design, circuit design and on-chip networking, as well as for professionals interested in designing fault-tolerant and high-throughput asynchronous circuits.
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Information
Table of contents
- Cover Page
- Half-Title Page
- Title Page
- Copyright Page
- Dedication Page
- Contents
- Preface
- Chapter 1 Introduction
- Chapter 2 Asynchronous Circuits
- Chapter 3 Asynchronous Networks-on-Chip
- Chapter 4 Optimizing Asynchronous On-Chip Networks
- Chapter 5 Fault-Tolerant Asynchronous Circuits
- Chapter 6 Fault-Tolerant Coding
- Chapter 7 Deadlock Detection
- Chapter 8 Deadlock Recovery
- Chapter 9 Summary
- Bibliography