
eBook - ePub
VLSI Architecture for Signal, Speech, and Image Processing
- 320 pages
- English
- ePUB (mobile friendly)
- Available on iOS & Android
eBook - ePub
VLSI Architecture for Signal, Speech, and Image Processing
About this book
This new volume introduces various VLSI (very-large-scale integration) architecture for DSP filters, speech filters, and image filters, detailing their key applications and discussing different aspects and technologies used in VLSI design, models and architectures, and more. The volume explores the major challenges with the aim to develop real-time hardware architecture designs that are compact and accurate. It provides useful research in the field of computer arithmetic and can be applied for various arithmetic circuits, for their digital implementation schemes, and for performance considerations.
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Yes, you can access VLSI Architecture for Signal, Speech, and Image Processing by Durgesh Nandan, Basant Kumar Mohanty, Sanjeev Kumar, Rajeev Kumar Arya, Durgesh Nandan,Basant Kumar Mohanty,Sanjeev Kumar,Rajeev Kumar Arya in PDF and/or ePUB format, as well as other popular books in Computer Science & Hardware. We have over one million books available in our catalogue for you to explore.
Information
Table of contents
- Cover Page
- Half Title page
- Title Page
- Copyright Page
- About the Editors
- Contents
- Contributors
- Abbreviations
- Preface
- 1. Evolution of 1-D, 2-D, and 3-D Lifting Discrete Wavelet Transform VLSI Architecture
- 2. Execution of Lifting-Scheme Discrete Wavelet Transform by Canonical Signed Digit Multiplier
- 3. Radix-8 Booth Multiplier in Terms of Power and Area Efficient for Application in Field of 2D DWT Architecture
- 4. Design and Performance Evaluation of Energy Efficient 8-Bit ALU at Ultra-Low Supply Voltages Using FinFET with 20 nm Technology
- 5. Design and Statistical Analysis of Strong Arbiter PUFs for Device Authentication and Identification
- 6. An Impact of Aging on Arbiter Physical Unclonable Functions
- 7. Advanced Power Management Methodology for SoCs Using UPF
- 8. Architecture Design: Network-on-Chip
- 9. Routing Strategy: Network-on-Chip Architectures
- 10. Self-Driven Clock Gating Technique for Dynamic Power Reduction of High-Speed Complex Systems
- 11. Optimization of SOC Sub-Circuits Using Mathematical Modeling
- 12. An Efficient Design of D Flip Flop in Quantum-Dot Cellular Automata (QCA) for Sequential Circuits
- 13. Design and Performance Analysis of Controlled DC-DC Converter
- Index