
Advanced MOS Devices and their Circuit Applications
- 150 pages
- English
- ePUB (mobile friendly)
- Available on iOS & Android
Advanced MOS Devices and their Circuit Applications
About this book
This text comprehensively discusses the advanced MOS devices and their circuit applications with reliability concerns. Further, an energy-efficient Tunnel FET-based circuit application will be investigated in terms of the output voltage, power efficiency, energy consumption, and performances using the device circuit co-design approach.
The book:
- Discusses advanced MOS devices and their circuit design for energy- efficient systems on chips (SoCs)
- Covers MOS devices, materials, and related semiconductor transistor technologies for the next-generation ultra-low-power applications
- Examines the use of field-effect transistors for biosensing circuit applications and covers reliability design considerations and compact modeling of advanced low-power MOS transistors
- Includes research problem statements with specifications and commercially available industry data in the appendix
- Presents Verilog-A model-based simulations for circuit analysis
The volume provides detailed discussions of DC and analog/RF characteristics, effects of trap-assisted tunneling (TAT) for reliability analysis, spacer-underlap engineering methodology, doping profile analysis, and work-function techniques. It further covers novel MOS devices including FinFET, Graphene field-effect transistor, Tunnel FETS, and Flash memory devices. It will serve as an ideal design book for senior undergraduate students, graduate students, and academic researchers in the fields including electrical engineering, electronics and communication engineering, computer engineering, materials science, nanoscience, and nanotechnology.
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Information
Table of contents
- Cover Page
- Half Title page
- Title Page
- Copyright Page
- Contents
- Editors
- Contributors
- Preface
- Acknowledgment
- Chapter 1 An overview of DC/RF performance of nanosheet field effect transistor for future low-power applications
- Chapter 2 Device design and analysis of 3D SCwRD cylindrical (Cyl) gate-all-around (GAA) tunnel FET using split-channel and spacer engineering
- Chapter 3 Investigation of high-K dielectrics for single- and multi-gate FETs
- Chapter 4 Measurement of back-gate biasing for ultra-low-power subthreshold logic in FinFET device
- Chapter 5 Compact analytical model for graphene field effect transistor: Drift-diffusion approach
- Chapter 6 Design of CNTFET-based ternary logic flip-flop and counter circuits using unary operators
- Chapter 7 Novel radiation-hardened low-power 12 transistors SRAM cell for aerospace application
- Chapter 8 Nanoscale CMOS static random access memory (SRAM) design: Trends and challenges
- Chapter 9 Variants-based gate modification (VGM) technique for reducing leakage power and short channel effect in DSM circuits
- Chapter 10 A novel approach for high speed and low power by using nano-VLSI interconnects
- Index