Mastering C++ Multithreading

Maya Posch

• Publisher: Packt Publishing
• Year: 2017
• ISBN:
  9781787121898
• Edition: 1
• Topic: Informatique
• Subtopic: Programmation en C++

Master multithreading and concurrent processing with C++About This Book• Delve into the fundamentals of multithreading and concurrency and find out how to implement them• Explore atomic operations to optimize code performance• Apply concurrency to both distributed computing and GPGPU processingWho This Book Is ForThis book is for intermediate C++ developers who wish to extend their knowledge of multithreading and concurrent processing. You should have basic experience with multithreading and be comfortable using C++ development toolchains on the command line.What You Will Learn• Deep dive into the details of the how various operating systems currently implement multithreading• Choose the best multithreading APIs when designing a new application• Explore the use of mutexes, spin-locks, and other synchronization concepts and see how to safely pass data between threads• Understand the level of API support provided by various C++ toolchains• Resolve common issues in multithreaded code and recognize common pitfalls using tools such as Memcheck, CacheGrind, DRD, Helgrind, and more• Discover the nature of atomic operations and understand how they can be useful in optimizing code• Implement a multithreaded application in a distributed computing environment• Design a C++-based GPGPU application that employs multithreadingIn DetailMultithreaded applications execute multiple threads in a single processor environment, allowing developers achieve concurrency. This book will teach you the finer points of multithreading and concurrency concepts and how to apply them efficiently in C++.Divided into three modules, we start with a brief introduction to the fundamentals of multithreading and concurrency concepts. We then take an in-depth look at how these concepts work at the hardware-level as well as how both operating systems and frameworks use these low-level functions.In the next module, you will learn about the native multithreading and concurrency support available in C++ since the 2011 revision, synchronization and communication between threads, debugging concurrent C++ applications, and the best programming practices in C++.In the final module, you will learn about atomic operations before moving on to apply concurrency to distributed and GPGPU-based processing. The comprehensive coverage of essential multithreading concepts means you will be able to efficiently apply multithreading concepts while coding in C++.Style and approachThis book is filled with examples that will help you become a master at writing robust concurrent and parallel applications in C++.

Atomic Operations - Working with the Hardware

A lot of optimization and thread-safety depends on one's understanding of the underlying hardware: from aligned memory access on some architectures, to knowing which data sizes and thus C++ types can be safely addressed without performance penalties or the need for mutexes and similar.

This chapter looks at how one can make use of the characteristics of a number of processor architectures in order to, for example, prevent the use of mutexes where atomic operations would prevent any access conflicts regardless. Compiler-specific extensions such as those in GCC are also examined.

Topics in this chapter include:

• The types of atomic operations and how to use them
• How to target a specific processor architecture
• Compiler-based atomic operations

Atomic operations

Briefly put, an atomic operation is an operation which the processor can execute with a single instruction. This makes it atomic in the sense that nothing (barring interrupts) can interfere with it, or change any variables or data it may be using.

Applications include guaranteeing the order of instruction execution, lock-free implementations, and related uses where instruction execution order and memory access guarantees are important.

Before the 2011 C++ standard, the access to such atomic operations as provided by the processor was only provided by the compiler, using extensions.

Visual C++

For Microsoft's MSVC compiler there are the interlocked functions, as summarized from the MSDN documentation, starting with the adding features:

Interlocked function	Description
InterlockedAdd	Performs an atomic addition operation on the specified LONG values.
InterlockedAddAcquire	Performs an atomic addition operation on the specified LONG values. The operation is performed with acquire memory ordering semantics.
InterlockedAddRelease	Performs an atomic addition operation on the specified LONG values. The operation is performed with release memory ordering semantics.
InterlockedAddNoFence	Performs an atomic addition operation on the specified LONG values. The operation is performed atomically, but without using memory barriers (covered in this chapter).

These are the 32-bit versions of this feature. There are also 64-bit versions of this and other methods in the API. Atomic functions tend to be focused on a specific variable type, but variations in this API have been left out of this summary to keep it brief.

We can also see the acquire and release variations. These provide the guarantee that the respective read or write access will be protected from memory reordering (on a hardware level) with any subsequent read or write operation. Finally, the no fence variation (also known as a memory barrier) performs the operation without the use of any memory barriers.

Normally CPUs perform instructions (including memory reads and writes) out of order to optimize performance. Since this type of behavior is not always desirable, memory barriers were added to prevent this instruction reordering.

Next is the atomic AND feature:

Interlocked function	Description
InterlockedAnd	Performs an atomic AND operation on the specified LONG values.
InterlockedAndAcquire	Performs an atomic AND operation on the specified LONG values. The operation is performed with acquire memory ordering semantics.
InterlockedAndRelease	Performs an atomic AND operation on the specified LONG values. The operation is performed with release memory ordering semantics.
InterlockedAndNoFence	Performs an atomic AND operation on the specified LONG values. The operation is performed atomically, but without using memory barriers.

The bit-test features are as follows:

Interlocked function	Description
InterlockedBitTestAndComplement	Tests the specified bit of the specified LONG value and complements it.
InterlockedBitTestAndResetAcquire	Tests the specified bit of the specified LONG value and sets it to 0. The operation is atomic, and it is performed with acquire memory ordering semantics.
InterlockedBitTestAndResetRelease	Tests the specified bit of the specified LONG value and sets it to 0. The operation is atomic, and it is performed using memory release semantics.
InterlockedBitTestAndSetAcquire	Tests the specified bit of the specified LONG value and sets it to 1. The operation is atomic, and it is performed with acquire memory ordering semantics.
InterlockedBit...