Chips and Intelligence

Low Power VLSI Design with Artificial Intelligence

Kumar Abhishek, Smrity Dwivedi, Jyotirmoy Pathak, Jyoti Kandpal, Suman Lata Tripathi

• Publisher: CRC Press
• Year: 2026
• Print ISBN:
  9781041170976
• eBook ISBN:
  9781040919903
• Edition: 1
• Topic: Technik & Maschinenbau
• Subtopic: Elektrotechnik & Telekommunikation

The text provides a comprehensive and forward-looking exploration of the integration between low-power CMOS VLSI design and cutting-edge technologies such as artificial intelligence and machine learning.

• Explores how artificial intelligence techniques are revolutionizing VLSI design, focusing on optimizing low-power circuits and systems.
• Presents the latest advancements and research in both artificial intelligence and VLSI design, such as FinFET and nanosheet-based logic, analog integrated circuits design, and optimization with artificial intelligence.
• Offers perspectives on future trends and potential developments in the integration of artificial intelligence with VLSI design to reduce the complexity and time-consuming process of semiconductor IC design.
• Addresses techniques for achieving energy efficiency in both digital and analog components and presents future trends in low-power VLSI design.
• Discusses topics such as artificial intelligence-driven adaptive power management in VLSI design and neural networks in low-power VLSI architectures.

The text is primarily written for senior undergraduates, graduate students, and academic researchers in electrical engineering, electronics and communications engineering, microelectronics, VLSI design, artificial intelligence, computer science and engineering.

Table of contents

• Cover Page
• Half Title page
• Series Page
• Title Page
• Copyright Page
• Contents
• Preface
• Editor biographies
• Contributors
• Chapter 1 Foundations of low-power VLSI
• Chapter 2 Revolutionizing VLSI design through artificial intelligence for low-power applications
• Chapter 3 Approximate computing techniques in machine learning architectures
• Chapter 4 AI and ML-based design methodologies for power-constrained integrated circuits
• Chapter 5 Neuromorphic computing in low-power CMOS VLSI circuits
• Chapter 6 Design of low-power approximate multiplier for error-tolerant applications
• Chapter 7 AI-driven optimization strategies for ring voltage-controlled oscillators: Methods, challenges, and future directions
• Chapter 8 AI-driven adaptive power management in VLSI design
• Chapter 9 Predicting MOSFET behavior using regression techniques for efficient VLSI circuit modeling
• Chapter 10 I/O pad integrity in energy-efficient neuromorphic chips
• Chapter 11 Low-power three-stage operational amplifier using reverse nested frequency compensation for biomedical devices in 45 nm technology
• Chapter 12 An intensive study on approximate computing for machine learning
• Chapter 13 Hardware ecosystem for AI: GPU, TPU, and Beyond
• Chapter 14 Design and analysis of an AI-enhanced low-power current-mode 8-bit DAC for VLSI circuits
• Chapter 15 FPGA acceleration for deep learning: Architecture, design flow, and real-world applications
• Index