Switch/Router Architectures

Shared-Bus and Shared-Memory Based Systems

Dr. James Aweya

• Publisher: Wiley-IEEE Press
• Year: 2018
• Print ISBN: 9781119486152
• eBook ISBN: 9781119486190
• Edition: 1
• Topic: Technology & Engineering
• Subtopic: Mobile & Wireless Communications
• Index: Technology & Engineering

A practicing engineer's inclusive review of communication systems based on shared-bus and shared-memory switch/router architectures

This book delves into the inner workings of router and switch design in a comprehensive manner that is accessible to a broad audience. It begins by describing the role of switch/routers in a network, then moves on to the functional composition of a switch/router. A comparison of centralized versus distributed design of the architecture is also presented. The author discusses use of bus versus shared-memory for communication within a design, and also covers Quality of Service (QoS) mechanisms and configuration tools.

Written in a simple style and language to allow readers to easily understand and appreciate the material presented, Switch/Router Architectures: Shared-Bus and Shared-Memory Based Systems discusses the design of multilayer switches—starting with the basic concepts and on to the basic architectures. It describes the evolution of multilayer switch designs and highlights the major performance issues affecting each design. It addresses the need to build faster multilayer switches and examines the architectural constraints imposed by the various multilayer switch designs. The book also discusses design issues including performance, implementation complexity, and scalability to higher speeds. This resource also:

• Summarizes principles of operation and explores the most common installed routers
• Covers the design of example architectures (shared bus and memory based architectures), starting from early software based designs
• Provides case studies to enhance reader comprehension

Switch/Router Architectures: Shared-Bus and Shared-Memory Based Systems is an excellent guide for advanced undergraduate and graduate level students, as well for engineers and researchers working in the field.

Table of contents

• Cover
• Series Page
• Title Page
• Copyright
• About the Author
• Preface
• Chapter 1: Introduction to Switch/Router Architectures
• Chapter 2: Understanding Shared-Bus and Shared-Memory Switch Fabrics
• Chapter 3: Shared-Bus and Shared-Memory-Based Switch/Router Architectures
• Chapter 4: Software Requirements for Switch/Routers
• Chapter 5: Architectures with Bus-Based Switch Fabrics: Case Study—Decnis 500/600 Multiprotocol Bridge/Router
• Chapter 6: Architectures with Bus-Based Switch Fabrics: Case Study—Fore Systems Powerhub Multilayer Switches
• Chapter 7: Architectures with Bus-Based Switch Fabrics: Case Study—Cisco Catalyst 6000 Series Switches
• Chapter 8: Architectures with Shared-Memory-Based Switch Fabrics: Case Study—Cisco Catalyst 3550 Series Switches
• Chapter 9: Architectures with Bus-Based Switch Fabrics: Case Study—Cisco Catalyst 6500 Series Switches with Supervisor Engine 32
• Chapter 10: Architectures with Shared-Memory-Based Switch Fabrics: Case Study—Cisco Catalyst 8500 CSR Series
• Chapter 11: Quality of Service Mechanisms in the Switch/Routers
• Chapter 12: Quality of Service Configuration Tools in Switch/Routers
• Chapter 13: Case Study: Quality of Service Processing in the Cisco Catalyst 6000 and 6500 Series Switches
• Appendix A: Ethernet Frame
• Appendix B: IPv4 PACKET
• References
• Index
• End User License Agreement