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Advanced Backend Code Optimization
About this book
This book is a summary of more than a decade of research in the area of backend optimization. It contains the latest fundamental research results in this field. While existing books are often more oriented toward Masters students, this book is aimed more towards professors and researchers as it contains more advanced subjects.
It is unique in the sense that it contains information that has not previously been covered by other books in the field, with chapters on phase ordering in optimizing compilation; register saturation in instruction level parallelism; code size reduction for software pipelining; memory hierarchy effects and instruction level parallelism.
Other chapters provide the latest research results in well-known topics such as register need, and software pipelining and periodic register allocation.
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Information
PART 1
Prolog: Optimizing Compilation
1
On the Decidability of Phase Ordering in Optimizing Compilation



1.1. Introduction to the phase ordering problem








Table of contents
- Cover
- Contents
- Title Page
- Copyright
- Introduction
- Part 1: Prolog: Optimizing Compilation
- Part 2: Instruction Scheduling
- Part 3: Register Optimization
- Part 4: Epilog: Performance, Open Problems
- Conclusion
- Appendix 1: Presentation of the Benchmarks Used in Our Experiments
- Appendix 2: Register Saturation Computation on Stand-Alone Ddg
- Appendix 3: Efficiency Of Sira on the Benchmarks
- Appendix 4: Efficiency of Non-Positive Circuit Elimination in the Sira Framework
- Appendix 5: Loop Unroll Degree Minimization: Experimental Results
- Appendix 6: Experimental Efficiency of Software Data Preloading and Prefetching for Embedded Vliw
- Appendix 7: Appendix of the Speedup-Test Protocol
- Bibliography
- Lists of Figures, Tables and Algorithms
- Index
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