Nanoelectronic Devices for Hardware and Software Security

Arun Kumar Singh, Balwinder Raj, Arun Kumar Singh, Balwinder Raj

• Éditeur: CRC Press
• Année: 2021
• ISBN:
  9781000465051
• Édition: 1
• Sujet: Technology & Engineering
• Sous-sujet: Nanotechnology & MEMS

Nanoelectronic Devices for Hardware and Software Security has comprehensive coverage of the principles, basic concepts, structure, modeling, practices, and circuit applications of nanoelectronics in hardware/software security. It also covers the future research directions in this domain. In this evolving era, nanotechnology is converting semiconductor devices dimensions from micron technology to nanotechnology. Nanoelectronics would be the key enabler for innovation in nanoscale devices, circuits, and systems.

The motive for this research book is to provide relevant theoretical frameworks that include device physics, modeling, circuit design, and the latest developments in experimental fabrication in the field of nanotechnology for hardware/software security. There are numerous challenges in the development of models for nanoscale devices (e.g., FinFET, gate-all-around devices, TFET, etc.), short channel effects, fringing effects, high leakage current, and power dissipation, among others. This book will help to identify areas where there are challenges and apply nanodevice and circuit techniques to address hardware/software security issues.

1

Emerging Nanoelectronic Devices

Mohd Adil Raushan, Naushad Alam, and Mohd Jawaid Siddiqui

DOI: 10.1201/9781003126645-1

Contents

1.1 Introduction

1.1.1 Transistor Action

1.1.2 Advent of CMOS

1.1.3 Scaling of CMOS

1.1.4 Moore’s Law

1.1.5 Koomey’s Law

1.2 Short Channel Effects

1.2.1 Subthreshold Slope ‘SS’

1.2.2 Drain Induced Barrier Lowering ‘DIBL’

1.2.3 Channel Length Modulation (CLM)

1.2.4 Gate-Induced Drain Leakage (GIDL)

1.2.5 Doping Gradient

1.3 Junctionless Transistors

1.3.1 Theory

1.3.2 JLFET

1.3.3 JAMFET

1.3.4 Features

1.4 Dopingless Transistors

1.4.1 Electrostatic Doping

1.4.2 Theory of Dopingless Transistors

1.4.3 Features

1.4.4 Challenges in JLT and DLT

1.4.5 Gate-Induced Drain Leakage in JLT, JAMFET, and DLT

1.5 Motivation behind the Work Presented on JLT and DLT

1.6 Simulation Environment of JLT and DLT

1.7 Steep Slope Devices

1.7.1 Limitations in CMOS

1.7.2 Impact Ionization MOS

1.7.3 MEMS and NEMS

1.7.4 Negative Capacitance FETs

1.7.5 Tunnel Field Effect Transistors

1.8 Chemically Doped TFET

1.8.1 Theory

1.8.2 Advantages

1.8.3 Drawbacks

1.9 Junctionless TFET

1.9.1 Working

1.10 Dopingless TFET

1.10.1 Working

1.11 Challenges in JLTFET and DLTFET

1.11.1 Low ON-State Current

1.11.2 Ambipolarity in Charge Plasma TFETs

1.12 Simulation Environment of JLTFET and DLTFET

1.13 Conclusion

References

1.1 INTRODUCTION

The era of electronic gadgets has set upon us, giving rise to many smart devices. These smart devices have vastly improved the standard of living of mankind. The ease of life is facilitated by these electronic gadgets, which have brought a revolutionary effect on human race. These electronic gadgets have affected the mankind in all spheres of life, such as engineering, health, education, warfare, entertainment, etc. The basic building block of these smart devices is the transistor, which has led to these innovations.

1.1.1 Transistor Action

The basic building block of these smart electronic gadgets is the transistor. These transistors were invented by Shockley, Bardeen, and Brattain in 1947. The transistor is essentially a three-terminal device where the third terminal (voltage) is used to control the current between the other two terminals. The discovery of the transistor was actually an accident that occurred in the labs of the previously mentioned scientists. Who would have thought this discovery would govern the lives of millions of people in years to come? In the beginning, till the 1970s, the bipolar junction transistors (BJT) served the purpose for the semiconductor industry. But now they are mostly used in radio frequency circuits. The other type of transistor, MOSFETs (metal-oxide semiconductor field effect transistors), has efficiently served the microelectronics market till now. The gate terminal in MOSFETs controls the current in the channel between the source and drain terminals through an insulating dielectric between the gate and the channel. There is also a fourth terminal in a MOSFET called the body, which is generally grounded except in certain situations. The mode of conduction in the channel region in a MOSFET is drift and diffusion. The drain and source terminals are doped heavily, whereas the channel is doped lightly, with opposite impurities. For a MOSFET to behave as a switch, it must have two states, that is, OFF-state and ON-state. For a perfect switch, the current in the OFF-state must be zero, and substantial current must be present in the ON-state. To understand these states, we need a quick review of basic MOSFET physics. Basically, the charge dynamics in the channel region are influenced with the aid of an electric field applied through the gate voltage in these field effect devices. For a negative gate voltage in n-MOSFET (n-type), the gate electrode attracts the majority holes in the lightly doped p-type channel, which increases the hole concentration at the Si–SiO₂ interface. This is called the accumulation mode of the device. For a positive voltage, the holes are pushed from the SiO₂–Si interface, thereby depleting the region at the interface. The negative acceptor ions are left behind, which constitutes the depletion region. This is called the depletion mode. For a further increase in positive voltage, the minority carriers’ ‘electrons’ are pulled at the interface, thereby creating an inversion layer at the interface. The gate voltage at the onset of inversion layer at the interface is termed as the threshold voltage. At gate to source voltage (V_GS) = threshold voltage (V_TH), the carrier concentration of minority electrons at the interface is equal to the hole concentration in the bulk region. Thus, for MOSFET to behave as a switch, the gate voltage can act as the stimulating voltage to trigger an ON-state from the OFF-state. Initially, for a drain to source voltage (V_DS), MOSFET remains in OFF-state for zero gate voltage V_G or V_G < V_TH. For V_G > V_TH, conduction of electrons take place between the source and drain. The current is not completely zero even in the OFF-state (when V_G = 0). In the subthreshold state, a finite leakage current is still present due to various factors. Nevertheless, the two states ON and OFF can be switched by the polarity of gate voltage. As expected, for a given V_G > V_TH, the drain current increases with increase in V_DS. But after some point, the drain current saturates for any further increase in V_DS, due to pinch-off of the channel region on the drain side. The drain current v/s drain voltage characteristics are called the output characteristics of the MOSFET shown in Figure 1.1. For a given V_DS, the drain current increases with increase in V_G, which is called the inversion mode.

FIGURE 1.1 I_D–V_DS curves for MOSFET [1].

1.1.2 Advent of CMOS

To this point we have discussed the n-MOSFET and its working in different modes, that is, accumulation, depletion, inversion. But it alone cannot perform the complete logic function of the NOT inverter, which is logic ‘0’ to ‘1’, and vice versa when the output load capacitance is not charged initially. It needs a complementary p-MOS to convert the logic ‘0’ to ‘1’. The complementary metal oxide semiconductor (CMOS) shown in the Figure 1.2 is capable of performing the complete logic function of a basic inverter (NOT gate). This complementary CMOS has been the backbone of the microelectronics industry for the past four decades. However, there is power dissipation in this CMOS inverter, which is static and dynamic in nature. The static power dissipation is caused by the finite leakage current in subthreshold state for both the p-MOS and n-MOS in the CMOS inverter. In the OFF-state, there is a leakage current I_OFF, even when switching does not take place. The static power dissipation is given by equation (1.1). The dynamic power dissipation occurs when switching takes place. For every cycle of switching, half of the energy stored or discharged in the load capacitor is dissipated as heat, which is the source for this dynamic power...